1. Field of the Invention
This invention relates generally to digital logic circuitry and, more particularly, to a high speed synchronization circuit for synchronizing an asynchronous input signal with a system clock.
2. Description of the Prior Art
As is well known, digital systems generally operate in a synchronous fashion. That is, operations are performed and data is transferred under the control of a system clock signal.
As is often the case, it may be necessary for one digital system to communicate with other digital systems operating on different unrelated clock signals or with external analog devices or circuits whose output signals are synchronous with no clock signal at all. In order to input these external signals into the operating circuitry of a digital system, it is first necessary to synchronize these input signals with the system's master clock signal or a derivative thereof.
Known synchronization circuits employ either delay type flip-flops or RS flip-flops which are set and reset by the system clock. This being the case, the known synchronization circuits are limited in frequency to less than half that of the system clock. Furthermore, the input asynchronous signal may be very long in duration and may appear as two or more sequential signals to the synchronization circuitry.